2111 comprehensive drive aurora, illinois 60505 phone: 630-851-4722 fax: 630- 851- 5040 www.conwin.com scg2500g5 synchronous clock generators us headquarters: 630-851-4722 european headquarters: +353-61-472221 general description the scg2500g5 is a mixed-signal phase lock loop generating cmos outputs from an intrinsically low jitter voltage controlled crystal oscillator. the scg2500g5 can lock to one of two possible input reference frequencies at 8 khz which is selectable using one input select pin. further features include an alarm output to indicate loss of reference, lor, or loss of lock, lol. if only one of the references is lost, the unit will disable its phase detector and will signal an alarm, but will not switch reference automatically. if both references are lost, the scg2500g5 will enter a free run state which will guarantee a 20 ppm accurate output. additionally, the free run mode may be entered manually by applying a high signal to the force free run pin. if the unit is in free run mode, the free run status pin will be high. all outputs, except the oscillator output, may be put into the tri-state high impedance condition for external testing purposes by applying a high signal to the reset/ tri-state pin. the filtered 8 khz is deriv ed from the oscillator output. the offset between the filtered output and the reference input will change with each reference rearrangement. the package maximum dimensions are .780? x .830? x .35? on a six layer fr4 board with surface mount pins. parts are assembled using high temperature solder to withstand surface mount reflow process. this product is rohs-5 compliant. rohs-5 indicates that this product is rohs compliant except for lead from those manufacturers wishing to take the lead exemption. features ? phase locked output frequency control intrinsically low jitter crystal oscillator two selectable references @ 8 khz alarm output tri-statable alarm outputs and reference output force free run function automatic free run operation upon loss of both references input duty cycle tolerant 3.3 volt power supply small size: 0.78? x 0.83? x 0.35? maximum surface mount, dil package rohs-5 compliant
data sheet #: sg103 p age 2 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice operating specifications table 2 parameter spe cifications notes voltage 3.3v 5% 1.0 current 150 ma @ 3.46v oscillator output frequencies 1.544, 2.048, 19.44, 20.48, 44.736, 51.84, and 77.76 mhz temperature range 0 to 70c input frequency ref 1 and ref 2 8 khz 2.0 input jitte r tolerance 31.25us typical (jitter frequencies > 10 hz) jitter bandwidth < 10 hz acquisition time approximately 1 second 3.0 capture/pull-in range 25 ppm minimum output duty cycle 40/60 % min/max @ 50% level output rise and fall time 3 ns @ 20% to 80% output level output load 30 pf alarm lor/lol status signal output free run accu racy 20 ppm phase gain 0.2db maximum package fr4 sm 0.78? x 0.83? x 0.350? (maximum) mtie @ synchronization rearrangement gr-253-core, 1999 r5-136 4.0, 4.1 absolute maximum rating tab l e 1 symbol parameter minimum nominal maximum units notes v cc power supply voltage -0.5 - +4.0 volts v i input voltage -0.5 - +5.5 volts t s storage temperature -65.0 - +150.0 c input and output characteristics tab l e 3 symbol parameter minimum nominal maximum units notes v ih high level input voltage 2.0 - 5.5 v v il low level input voltage 0 - 0.8 v t io i/o to output valid - - 10 ns c out output capacitance - - 10 pf v ho high level output voltage loh = -4ma 2.40 - - - vcc min v io low level output voltage lo1 = 8ma - - 0.4 - vcc max t ir input reference signal pulse width 30 - - ns
data sheet #: sg103 p age 3 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice input selection / output response table 5 inputs ouputs reset/ oscillator 8 khz notes tri-state sel ab ref a ref b fr fr status alarm output output 1 xxxxtstsfrts 0 x x x 1 1 1 fr fr 0 0 a a 0 0 0 lra lrad 0 1 na a 0 0 0 lrb lrbd 0 0naa001 uu5.0 0 1ana001 uu5.0 0 0 a na 0 0 0 lra lrad 0 x na na 0 1 1 fr fr notes: 1.0 requires e xter nal regulation 2.0 externally selectable via input select ab 3.0 from a 20 ppm offset in reference frequency 4.0 entry into free run doesn?t meet requirement for initial 2.33 seconds of self-timing 4.1 if the selected reference is removed, system response to the alarm must be less than 10s 5.0 on alarm assertion, switch references. if alarm is still active, force free run ts = tri-state u = unstable fr = free run lrad = locked to ref a and divided down lra = locked to ref a lrab = locked to ref b and divided down lrb = locked to reb b x = don?t care output jitter specifications table 4 jitter bw 10 hz - 1 mhz sonet jitter bw 12 khz - 20 mhz frequency (mhz) ps (rms) m ui ps (rms) m ui 1.544 30 typ. 0.046 typ. 4 typ. 0.006 typ. 2.048 30 typ. 0.061 typ. 4 typ. 0.008 typ. 19.44 10 typ. 0.194 typ. 1 max., 0.5 typ. 0.019 max. 20.48 10 typ. 0.205 typ. 1 max., 0.5 typ. 0.020 max. 34.368 10 typ. 0.344typ. 1 max., 0.5 typ. 0.034max. 44.736 10 typ. 0.447typ. 1 max., 0.5 typ. 0.045 max. 51.84 10 typ. 0.518 typ. 1 max., 0.5 typ. 0.052 max. 77.76 10 typ. 0.778typ. 1 max., 0.5 typ. 0.078 max.
data sheet #: sg103 p age 4 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice circuit board footprint figure 1 pin connection 1 filtered 8 khz output 2 tck 3tms 4 ground 5 force free run / tdi (1 = free run) 6 alarm output (1 = alarm) 7 ref b 8 ref a 9 oscillator output 10 free run status output (fr = 1) 11 vcc 12 tdo 13 reset / tri-state 14 input reference select ab (a = 0, b = 1) pin connections tab l e 6 0.650 0.100 typ 0.050 typ 0.800 0.640 0.080 (16.51mm) (1.27mm) (16.26mm) (20.32mm) (2.03mm) 0.050 typ (1.27mm) (2.54mm) 8 khz phase aligner refb refa select ab analog filter oscillator output 1 / n alarm output low jitter vcxo force free run free run status output 8 khz output tri-state/ reset dpfd block diagram figure 2
data sheet #: sg103 p age 5 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice package maximum dimensions figure 3
data sheet #: sg103 p age 6 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice lol (internal signal) phase detector (internal signal) external reference (selected input a or b) internal reference (internal signal) lor (internal signal) 4 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 2 start-up region 1 1 alarm output (lor + lol) start-up region 1 19.44 mhz reference input units 8 khz reference input units < 31.25 sec 31.25 sec > 31.25 sec < 1 sec > 1 sec 1 sec 2 3 4 125 sec wide range lor is active when lol is active 5 minimum pulse width = 2 sec minimum pulse width = 62.5 sec during start-up, the lol alaram will pulse during the few seconds of operation loss of reference condition alarm timing figure 4 alarmtiming legend use for all alar m timing diagrams tab l e 7
data sheet #: sg103 p age 7 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice lol (internal signal) phase detector (internal signal) external reference (selected input a or b) internal reference (internal signal) lor (internal signal) 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 2 2 2 2 1 5 alarm output (lor + lol) loss of lock condition alarm timing figure 5
data sheet #: sg103 p age 8 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice meets eia-481a and eiaj-1009b 1.00 dia 250 pcs/reel maximum .08 3.15 13.00 8.45 dia .08 1.31 .08 direction of feed (customer) (33.27mm) (2.0mm) (2.0mm) (330.2mm) (80mm) (2.0mm) (214.6mm) dia (25.4mm) (bo) pocket size (ao) (ko) 20.92mm (.824") 21.17mm (.833") 9.49mm (.374") 32mm (1.26") width 32mm (1.26") pitch 6.99mm (.275") (ki) .374 3 ad (9.49mm) .014 (.36mm) (28.4mm) 1.118 .559 (14.2mm) .079 (2mm) dia. min. .059 (1.5mm) dia. .063 (1.6mm) dia. .069 (1.75mm) (4mm) .157 (2mm) .079 .063 (1.6mm) .059 (1.5mm) .065 .072 (1.85mm) (1.65mm) (ko) (20.92mm) .824 .833 (bo) (21.17mm) bd 3 1.26 (32.0mm) .275 (6.99mm) 1.260 (32.0mm) .236 (6.0mm) (1.93mm) .076 45 19.4 .383 (9.74mm) (6.00mm) .236 (3.00mm) .118 .138 (3.51mm) w p tape and reel packaging figure 6
data sheet #: sg103 p age 9 of 10 rev: 01 date: 02/21/06 ? copyright 2006 the connor-winfield corp. all rights reserved specifications subject to change without notice te m p 0 100 150 200 250 50 12345678 time (minutes) (deg c) recommended reflow profile peak temp: 217 deg c max rise slope: 1.5 deg c/sec time above 150 c: 100 sec solder profile figure 7 ordering information scg{xxxx}-{fff.fff}{m} xxxx equals a specific model (2500g5) fff.fff equals the oscillator output frequency (001.544, 002.048, 019.44, 020.48, 034.368, 044.736, 051.84, 077.76) m equals mhz and is added to all part numbers example: to order an scg2500g5 with an oscillator output of 77.76 mhz, order part number scg2500g5-077.76m please contact connor-winfield for other frequencies that may be available.
revision revision date note 00 07/07/05 product release 01 02/21/06 added phase gain to table 2
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